Regviz

Silicon Labs /EFR32BG22C112F352GM32 /CMU_S /EUART0CLKCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as EUART0CLKCTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32BG22C222F352GN32/CMU_NS/EUART0CLKCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)CLKSEL

CLKSEL=DISABLED

Description

No Description

Fields

CLKSEL

Clock Select

0 (DISABLED): UART is not clocked

1 (EM01GRPACLK): EM01GRPACLK is clocking UART

2 (EM23GRPACLK): EM23GRPACLK is clocking UART

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data